Clients Talk

It was a simple task offloaded for a board job but the turnaround times we got are amazing and working first time.
Helmut Henschke - DH Electronics

A lot of testing time has to be devoted before releasing silicon for mass production. Aizyc offers to be your test house to regress the silicon with variety of tests. Aizyc offers Pre and Post-Silicon validation services.
Post Silicon Validation

  • Chip bring upAizyc Silicon validation
  • Board design and validation
  • Reference boards development
  • Low level test drivers
  • Test plan development
  • Test Automation plan
  • Sample drivers for interface bring-up
  • Sample Application software for test
  • Design hooks for debug


Pre Silicon Validation

  • Firmware / Software / Hardware simulation on FPGA
  • Software and Drivers validation
  • Model development in System C
  • Tools: Altera, Xilinx, Vertex4

Project Experience:

Validated 20million gate for digital moving picture camera ASIC
complete design CUSTOM partitioned and ported onto 16 Virtex-5 LX300 FPGAs
All interfaces brought up and validated on FPGA emulation board
All interfaces worked first pass on the silicon
Validated JPEG 2000 Encoder Decoder
system configured and controlled by 32bit RISC CPU
Encoding / Decoding of both raw and RGB mode
RTL integration, standalone and top level verification
Ported encoder / decoder engine onto FPGA
Custom design partitioning onto 6 Virtex-5 FPGAs
Validated code first pass on silicon


    SOLUTION SCOPE
    Pre-silicon

    • Architect the RTL partition of the design
    • Porting the RTL on a 16-FPGA platform using V5 LX330 FPGAs
    • Bring-up and functional validation of each of the blocks on the FPGA platform
    • Integration of all blocks for full system validation running firmware/software
    • Developed diagnostic firmware for Ethernet and SATA blocks

    Post-silicon

    • Designed the complete bring-up  platform (Board design, manufacture, assembly, bring-up)
    • Adapted FPGA environment’s diagnostic firmware for bring up of all blocks and interfaces
    • Bring-up of the following high speed interfaces
      • DDR 3 (800 MHz)
      • XAUI (6.25 Gbps)
      • USB 2.0 (480 Mbps)
      • Gigabit Ethernet (1000 Mbps)
      • HDMI 1.3
      • PCIe Gen 1
      • SATA Gen 2
    • Used following equipment for characterization
      • IXIA Protocol Analyzer 400T (Gigabit Ethernet )
      • Lecroy Analyzer/Exerciser (PCIe)
      • Finisar SATA Gen 2 Analyzer/Exerciser (SATA)
      • Agilent 12 GHz SDA
    • Compliance Testing for PCIe, SATA, Ethernet and USB
    • Recommended debug hooks within the Chip.

    APPLICATION
    The Chipset does image capture, processing and storage.