Clients Talk

It was a simple task offloaded for a board job but the turnaround times we got are amazing and working first time.
Helmut Henschke - DH Electronics

Aizyc USB 2.0 Device Controller IP is compact low power and scalable IP core. The controller IP core is fully synthesizable core suitable for different process. Generic application interface for easy integration.

Overview

Aizyc's USB2.0 device controller IP core is fully synthesizable core suitable for different process. Generic application interface for easy integration. It supports different endpoint configurations for varied applications. The IP core is portable to an ASIC or a FPGA. It has been validated on Xilinx platform. Along with the IP core, we will provide complete test environment with constraint randomized test cases and our full support during integration. The IP core also has passed USB IF certification with multiple customer products.

 

Feature List

  • Fully compliant with USB Specification rev 2.0
  • Supports high (480 Mbps), full (12 Mbps) speed operation
  • Supports Control, Bulk and Interrupt transactions
  • External application interface
  • Interface to support external UTMI PHY
  • Customize endpoint numbers and configurations
  • FPGA & Silicon proven

 

 

 

 

 


Functional Block Description

Command Processor
The command processor is the important block of device controller. It does the decoding and execution of all standard commands. It also maintains the device state machine and the handshake database for standard and vendor specific commands.

Control Endpoint
Endpoint controller has the control of all USB control transfers. It maintains the state machine for Setup, Data and Status stages of control transfers. Data toggle and handshakes for control transfers will be controlled in this module.

Endpoint FIFO
Every endpoint in the device controller has associated FIFO buffer for data transfer. The buffer size for each endpoint is configurable. 

Application Interface
The device controller has a generic application interface which can be used to interface different applications. E.g. Ethernet, serial port, parallel port

UTMI+/ULPI Interface
This interface is provided for external standard ULPI/UTMI+ PHY. This ULPI interface is a wrapper around UTMI+ interface. Any of the two interfaces can be used for external USB PHY

 

Deliverables

IP Downloads

Please email us at sales@aizyc.com or visit our Downloads page

IP Deliverables

  1. Verilog source / encrypted code of the IP core
  2. Verilog Test environment  and test scripts
  3. Synthesis constraints and scripts
  4. Documentation – Design , Verification & Integration guide
  5. FPGA validation platform (Xilinx / Altera)

Pricing

IP Licensing

Our Pricing varies based on your Needs.
1. Per product, multiple products or perpetual
2. With and without source code
3. Default email support for all IPs is 12 months
Shoot us an email with your requirement sales@aizyc.com